DocumentCode :
379749
Title :
Window-based susceptance models for large-scale RLC circuit analyses
Author :
Zheng, Hui ; Krauter, Byron ; Beattie, Michael ; Pileggi, Lawrence
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
fYear :
2002
fDate :
2002
Firstpage :
628
Lastpage :
633
Abstract :
Due to the increasing operating frequencies and the manner in which the corresponding integrated circuits and systems must be designed, the extraction, modeling and simulation of the magnetic couplings for final design verification can be a daunting task. In general, when modeling inductance and the associated return paths, one must consider the on-chip conductors as well as the system packaging. This can result in an RLC circuit size that is impractical for traditional simulators. In this paper we demonstrate a localized, window-based extraction and simulation methodology that employs the recently proposed susceptance (the inverse of inductance matrix) concept. We provide a qualitative explanation for the efficacy of this approach, and demonstrate how it facilitates pre-manufacturing simulations that would otherwise be intractable. A critical aspect of this simulation efficiency is owed to a susceptance-based circuit formation that we prove to be symmetric positive definite. This property, along with the sparsity of the susceptance matrix, enables the use of some advanced sparse matrix solvers. lye demonstrate this extraction and simulation methodology on some industrial examples
Keywords :
circuit simulation; electromagnetic coupling; inductance; integrated circuit interconnections; integrated circuit modelling; integrated circuit packaging; sparse matrices; transient analysis; RLC circuit size; design verification; inductance matrix inverse; inductance modeling; integrated circuits; large-scale RLC circuit analyses; localized window-based extraction methodology; localized window-based simulation methodology; magnetic couplings; on-chip conductors; operating frequencies; pre-manufacturing simulations; return paths; sparse susceptance matrix; symmetric positive definite circuit formulation; system packaging; transient simulation; window-based susceptance models; Circuit simulation; Coupling circuits; Frequency; Inductance; Integrated circuit modeling; Large-scale systems; RLC circuits; Sparse matrices; Symmetric matrices; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings
Conference_Location :
Paris
ISSN :
1530-1591
Print_ISBN :
0-7695-1471-5
Type :
conf
DOI :
10.1109/DATE.2002.998366
Filename :
998366
Link To Document :
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