An EMC-compliant design method for high-density integrated circuits

Author

Ramdani, Mohamed ; Levanv, J.-L.

Author_Institution

Ecole Superieure d´´Electronique de l´´Ouest, Angers, France

fYear

2002

fDate

2002

Firstpage

1115

Abstract

This paper deals with an innovative method of EMC-compliant design. This technique helps to optimize emission level as soon as in the design phase, and provides noise-related solutions which will be evaluated and integrated into the silicon. This method allows to model the activity of thousand-gate circuits thanks to only two current generators which represent supply current consumption in the VDD and the VSS rails. This allows EMC evaluation and optimization (conducted noise) for a packaged integrated circuit within its electrical environment

Keywords

circuit optimisation; electromagnetic compatibility; elemental semiconductors; integrated circuit design; integrated circuit noise; low-power electronics; power supply circuits; silicon; EMC; EMC compliant design; Si; VDD; VSS rails; conducted noise; emission level; optimization; packaged integrated circuit; silicon; supply current consumption; thousand-gate circuits; Current supplies; Design methodology; Design optimization; Electromagnetic compatibility; Integrated circuit noise; Noise level; Phase noise; Rails; Silicon; Variable structure systems;

fLanguage

English

Publisher

ieee

Conference_Titel

Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings

Conference_Location

Paris

ISSN

1530-1591

Print_ISBN

0-7695-1471-5

Type

conf

DOI

10.1109/DATE.2002.998470

Filename

998470