DocumentCode
3798488
Title
A voltage dependent capacitance model including effects of manufacturing process variabilities on voltage coefficients
Author
A. Ito
Author_Institution
Semicond. Sector, Harris Corp., Melbourne, FL, USA
Volume
14
Issue
9
fYear
1995
Firstpage
1093
Lastpage
1097
Abstract
A voltage dependent capacitance model, including the effects of process variations, has been developed using a voltage-controlled voltage source defined by a polynomial for Monte Carlo simulations of mixed-signal design applications. Each of the polynomial coefficients is defined by a simple first order polynomial using the process variables to accurately reflect the manufacturing process. The variability of voltage coefficient simulated by this mixed mode model is shown to be in good agreement with the empirical data.
Keywords
"Voltage","Capacitance","Manufacturing processes","Capacitors","Polynomials","Doping","Integrated circuit modeling","Circuit simulation","Circuit synthesis","Signal design"
Journal_Title
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.406711
Filename
406711
Link To Document