Design Considerations for Paralleling Bipolar Transistors

A simple design procedure for direct paralleling of bipolar junction transistors (BJT´s) is proposed. It is based on the matching of transfer characteristics (Ic versus VCE) at a low collector voltage. The design procedure further addresses the base and collector circuit´s layout requirements, optimal base-driven conditions, and thermal design requirements for reliable and efficient operation of BJT´s in parallel. The influence of a snubber circuit is also discussed. The procedure is verified experimentally by performing dynamic and reversebias safe operating area (RBSOA) testings.