Monitoring the Electrical Properties of the Back Silicon Interface of Silicon-on-Sapphire Wafers

The density and the electrical nature of the interface traps at the silicon-sapphire interface of silicon-on-sapphire (SOS) MOSFETs have a significant influence on the electrical characteristics of these transistors. This letter describes a simple MOS test structure for evaluating the electrical properties of this interface of SOS wafers. Measurement and modeling of the C-V characteristics of the test structure fabricated on production SOS wafers are presented. We have demonstrated that the C-V characteristics are an efficient tool for studying the depletion of the silicon-sapphire interface by the interface trapped charge.