• DocumentCode
    381258
  • Title

    Processing and reliability of flip chip with lead-free solders on halogen-free microvia substrates

  • Author

    Baldwin, Daniel F. ; Baynham, Grant ; Boustedt, Katarina ; Wennerholm, Claes

  • Author_Institution
    Adv. Assembly Technol., Siemens Dematic Electron. Assembly Syst., Norcross, GA, USA
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    310
  • Lastpage
    315
  • Abstract
    An assembly process for environmentally conscious low cost flip chip assembly to microvia laminate substrates is presented, based on a fully integrated high speed flip chip assembly line. The process includes the flux application, chip placement, reflow process, and underfill processing. Flux and underfill material compatibility is discussed, and data presented analyzing the quality of the solder joint formation and underfill adhesion to halogen-free solder masks. 204-μm pitch peripheral bump, daisy chain test chips with edge lengths of 5 mm and 10 mm respectively are used. Comprehensive reliability results, are presented, comparing the two lead-free to tin/lead eutectic interconnect systems. The chips are assembled on microvia substrates with electroless nickel/immersion gold surface finish, comparing conventional to halogen-free FR-4 and solder masks. A fast flow snap cure underfill, qualified for use with eutectic tin/lead joints on conventional FR-4, is used for both board types. Reliability results from air-to-air thermal shock testing are presented, comparing lead-free to eutectic interconnect systems mounted on conventional and halogen-free microvia substrates. Process and failure mode analysis are presented, based on X-ray inspection, C-SAM analysis, and assembly cross sections.
  • Keywords
    X-ray applications; acoustic microscopy; adhesion; circuit reliability; encapsulation; failure analysis; flip-chip devices; inspection; laminates; life testing; reflow soldering; 10 mm; 204 micron; 5 mm; C-SAM analysis; X-ray inspection; air-to-air thermal shock testing; assembly cross sections; chip placement; daisy chain test chips; edge lengths; failure mode analysis; flip chip; flux application; halogen-free microvia substrates; high speed flip chip assembly line; lead-free solders; microvia laminate substrates; peripheral bump; reflow process; reliability; solder joint formation; underfill adhesion; underfill processing; Assembly; Costs; Data analysis; Environmentally friendly manufacturing techniques; Failure analysis; Flip chip; Joining materials; Laminates; Lead; Tin;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Manufacturing Technology Symposium, 2002. IEMT 2002. 27th Annual IEEE/SEMI International
  • Print_ISBN
    0-7803-7301-4
  • Type

    conf

  • DOI
    10.1109/IEMT.2002.1032771
  • Filename
    1032771