Dynamically reconfigurable vision with high performance CMOS active pixel sensors (APS)

A high-performance computational imager based on integration of CMOS active pixel imager array with on-chip signal processing and control via a new column-parallel architecture is presented. Unlike CCDs and other CMOS imagers, the sensor is capable of providing simultaneous image data from three flexible, partially overlapping, dynamically reconfigurable regions of interest (ROIs) with different spatial resolution over a large field-of-view (FOV) to achieve data-efficient operation with high update rates. The power dissipation depends upon reconfiguration modes, but is small even in the worst case. Unlike conventional computational imagers, the integration of processing circuitry does not trade with radiometric accuracy, nor does it impose any limit to scaling the imager size to larger format and smaller pixels. By eliminating the need for mechanical pointing through floating-fovea support, the dynamically reconfigurable vision sensor (DSRVS) enables a low-power staring vision system. By maximizing system throughput through intelligent data reduction and through real-time programmability, it meets the diverse and conflicting requirements of search, identify and track vision-modes, and represents an efficient platform for high-bandwidth automatic target acquisition and tracking.