DocumentCode :
382198
Title :
Rapid thermal processing of high dielectric constant gate dielectrics for sub 70 nm silicon CMOS technology
Author :
Fakhruddin, M. ; Singh, Rajendra ; Poole, Kelvin F. ; Kar, Samares
Author_Institution :
Dept. of Electr. & Comput. Eng., Clemson Univ., SC, USA
fYear :
2002
fDate :
2002
Firstpage :
89
Lastpage :
91
Abstract :
The use of high-κ gate dielectrics in place of the currently used Si-based gate dielectrics has the potential to push Si complementary metal-oxide-silicon (CMOS) technology to the fundamental limit of about 10 nm feature size circuits. Rapid thermal atomic layer chemical vapor deposition (RTALCVD) is used to deposit ZrO2 on Si substrates to fabricate MIS structures. The leakage current and capacitance measurements were done to analyze their electrical properties. Achieving low leakage current density along with high capacitance per unit area demonstrates the superior performance of our process.
Keywords :
CMOS integrated circuits; MIS devices; MIS structures; capacitance; chemical vapour deposition; dielectric thin films; elemental semiconductors; integrated circuit manufacture; leakage currents; rapid thermal processing; semiconductor device manufacture; silicon; zirconium compounds; 10 nm; 70 nm; MIS structures; Si; Si CMOS technology; Si substrates; Si-ZrO2; ZrO2; capacitance; chemical vapor deposition; circuit feature size; high-κ gate dielectrics; leakage current; rapid thermal atomic layer CVD; rapid thermal processing; CMOS process; CMOS technology; Chemical technology; Circuits; Dielectric constant; Dielectric substrates; High-K gate dielectrics; Leakage current; Rapid thermal processing; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Advanced Thermal Processing of Semiconductors, 2002. RTP 2002. 10th IEEE International Conference of
Print_ISBN :
0-7803-7465-7
Type :
conf
DOI :
10.1109/RTP.2002.1039444
Filename :
1039444
Link To Document :
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