SRAM Array Structures for Energy Efficiency Enhancement

Energy efficiency is a supreme design concern in many ultralow-power applications. In such applications, static random-access memory (SRAM) plays a significant role in energy consumption due to the high density for evermore increased computing power. This brief explores and analyzes SRAM array structures for energy efficiency improvement. In contrast to the traditional practices where SRAM arrays enclose more rows than columns, this work reveals that better SRAM energy efficiencies can be achieved with a wider SRAM array structure with fewer rows than columns particularly at low supply voltage. The analysis shows that the array structure optimization can improve the energy efficiency up to 38% (64 kbit) and 10% (8 kbit) for the same SRAM bit density and the same supply voltage.