DocumentCode :
3833176
Title :
Erratum: Digital-summation threshold-logic gates: a new circuit element
Author :
K.E. Hurst
Volume :
121
Issue :
5
fYear :
1974
fDate :
5/1/1974 12:00:00 AM
Firstpage :
344
Journal_Title :
Proceedings of the Institution of Electrical Engineers
Publisher :
iet
ISSN :
0020-3270
Type :
jour
DOI :
10.1049/piee.1974.0069
Filename :
5250947
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=3833176
