DocumentCode :
383331
Title :
Highly-performant 38 nm SON (silicon-on-nothing) P-MOSFETs with 9 nm-thick channels
Author :
Monfray, S. ; Skotnicki, T. ; Morand, Y. ; Descombes, S. ; Talbot, A. ; Dutartre, D. ; Leverd, F. ; Le Friec, Y. ; Palla, R. ; Pantel, R. ; Haond, M. ; Nier, M.-E. ; Vizioz, C. ; Louis, D.
Author_Institution :
ST Microelectron., Crolles, France
fYear :
2002
fDate :
7-10 Oct 2002
Firstpage :
20
Lastpage :
22
Abstract :
38 nm SON P-MOSFETs are presented in this paper, completing the formerly presented SON NMOSFETs and thus demonstrating the electrical viability of the SON architecture for aggressive CMOS. Morphological results show that the SON architecture allows comfortable silicidation process leading to a large improvement of the performance. In particular, for the thinnest Si-channel (9 nm), extremely good subthreshold behavior is observed (with less than 60 mV of DIBL on a 38 nm transistor). The performances of the devices are excellent (360 μA/μm Ion with 100 nA Ioff for a 38 nm PMOS device @-1.4V with Tox=20 Å) and show large potential of the SON architecture for future CMOS generations.
Keywords :
MOSFET; semiconductor device measurement; silicon; 100 nA; 20 A; 38 nm; 9 nm; SON P-MOSFET; SON architecture; future CMOS; performance; silicidation process; silicon-on-nothing; subthreshold behavior; MOSFETs; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOI Conference, IEEE International 2002
Print_ISBN :
0-7803-7439-8
Type :
conf
DOI :
10.1109/SOI.2002.1044400
Filename :
1044400
Link To Document :
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