Voltage regulator based on an high-efficiency adaptive charge pump

Author

Palumbo, G. ; Pappalardo, D. ; Gaibotti, M.

Author_Institution

Dipt. Elettrico Elettronico e Sistemistico, Catania Univ., Italy

Volume

1

fYear

2002

fDate

2002

Firstpage

61

Abstract

In this paper, both a charge pump which changes its number of stages to achieve the minimum power consumption and a regulated voltage reference based on it is presented. The charge pump can modifies the number of stages from 1 to 3 through a proper assigning of the clock phases, and it uses the same amount of capacitance (i.e., silicon area) in all the topologies. The voltage regulator, based on the adaptive charge pump can dynamically select the equivalent stage behavior to maximize the power efficiency under power supply changes. The behavior of the circuits were confirmed through Eldo simulation using a 0.35 μm CMOS EEPROM technology.

Keywords

CMOS integrated circuits; SPICE; adaptive control; circuit simulation; clocks; integrated circuit design; integrated circuit modelling; low-power electronics; network topology; voltage regulators; 0.35 micron; CMOS EEPROM technology; CMOS processes; SPICE simulations; capacitance; charge pump stage number change; circuit topology; clock phase assignment; equivalent stage behavior dynamic selection; high-efficiency adaptive charge pumps; power consumption minimization; power efficiency maximization; power supply changes; regulated voltage references; voltage regulators; CMOS technology; Capacitance; Charge pumps; Circuit topology; Clocks; Energy consumption; Power supplies; Regulators; Silicon; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 2002. 9th International Conference on

Print_ISBN

0-7803-7596-3

Type

conf

DOI

10.1109/ICECS.2002.1045333

Filename

1045333