DocumentCode
383746
Title
An evolutionary algorithm for the testable allocation problem in high-level synthesis
Author
Harmanani, Haidar ; Saliba, Rony
Author_Institution
Dept. of Comput. Sci., Lebanese American Univ., Byblos, Lebanon
Volume
2
fYear
2002
fDate
2002
Firstpage
471
Abstract
A high level synthesis for testability method is presented with the objective to generate testable RTL designs from behavioral descriptions. The approach is formulated as an allocation problem and solved using an efficient genetic algorithm. We follow the allocation method with an automatic test point selection algorithm. The method has been implemented and design comparisons are reported.
Keywords
automatic test pattern generation; circuit CAD; circuit optimisation; design for testability; genetic algorithms; high level synthesis; integrated circuit design; integrated circuit testing; logic testing; automatic test point selection algorithm; behavioral descriptions; design comparisons; evolutionary algorithm; genetic algorithm; high level synthesis for testability; testable RTL designs; testable allocation problem; Automatic testing; Biological cells; Built-in self-test; Circuit testing; Evolutionary computation; Genetic algorithms; High level synthesis; Kernel; Logic testing; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 2002. 9th International Conference on
Print_ISBN
0-7803-7596-3
Type
conf
DOI
10.1109/ICECS.2002.1046199
Filename
1046199
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