DocumentCode :
383787
Title :
Automated SystemC to VHDL translation in hardware/software codesign
Author :
Côté, Christian ; Zilic, Zeljko
Author_Institution :
Ind./Consumer Div., Teradyne Inc., Boston, MA, USA
Volume :
2
fYear :
2002
fDate :
2002
Firstpage :
717
Abstract :
Recent advances in electronic circuit technology have enabled the creation of system-on-chip, which comprises both hardware and software components. Codesign takes advantage of this opportunity by considering both components as a whole throughout the design process. While an increasing number of tools are being offered, most concentrate on the simulation of systems, with little or no support for their implementation. This paper describes a translation algorithm developed to act as a bridge between simulation and implementation by translating SystemC code to VHDL.
Keywords :
C language; hardware description languages; hardware-software codesign; integrated circuit design; program interpreters; system-on-chip; SoC implementation; SoC simulation; SystemC code; automated SystemC to VHDL translation; codesign tools; design process; electronic circuit technology; hardware components; hardware/software codesign; software components; system-on-chip; translation algorithm; Bridge circuits; Bridges; Circuit simulation; Computer architecture; Design engineering; Electronic circuits; Hardware; Process design; Software tools; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 2002. 9th International Conference on
Print_ISBN :
0-7803-7596-3
Type :
conf
DOI :
10.1109/ICECS.2002.1046269
Filename :
1046269
Link To Document :
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