DocumentCode
383809
Title
Piecewise linear operations on sigma-delta modulated signals
Author
Hidaka, Yuji ; Fujisaka, Hisato ; Sakamoto, Masahiro ; Morisue, Mititada
Author_Institution
Fac. of Inf. Sci., Hiroshima City Univ., Japan
Volume
3
fYear
2002
fDate
2002
Firstpage
983
Abstract
Piecewise linear (PWL) circuits operating on sigma-delta (ΣΔ) modulated signals are proposed. The proposed circuit library includes an absolute circuit, a min/max selector and a negative resistance. As an application of the PWL circuits, a median filter is presented. It is structured with 23% of logic gates consumed by an equivalent filter with 8-bit parallel signal form. It is expected that application of ΣΔ domain signal processing including proposed PWL operations to other modern information processing and communication systems such as neural networks and chaotic communication systems will reduce their hardware cost.
Keywords
chaos; circuit CAD; negative resistance circuits; piecewise linear techniques; sigma-delta modulation; 8 bit; absolute circuit; chaotic communication systems; circuit library; hardware cost; median filter; min/max selector; negative resistance; parallel signal form; piecewise linear operations; sigma-delta modulated signals; Chaotic communication; Circuits; Delta-sigma modulation; Filters; Information processing; Libraries; Logic gates; Neural networks; Piecewise linear techniques; Signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 2002. 9th International Conference on
Print_ISBN
0-7803-7596-3
Type
conf
DOI
10.1109/ICECS.2002.1046414
Filename
1046414
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