DocumentCode
3841443
Title
From real-time emulation to ASIC integration for image processing applications
Author
I.C. Kraljic;G.M. Quenot;B. Zavidovique
Author_Institution
Dept. Syst. de Perception, DGA/Etablissement Tech. Central de l´Armement, Arcueil, France
Volume
4
Issue
3
fYear
1996
Firstpage
391
Lastpage
404
Abstract
A methodology for automatically deriving image processing ASICs from their real-time emulation on the data-flow functional computer is presented. The aim of the method is to reduce the time and effort required to synthesize and validate ASICs after emulation. This is achieved by optimizing the architecture validated on the emulator and integrating the optimized resources. The paper presents the derivation of a 1100 MIPS defect detector.
Keywords
"Emulation","Application specific integrated circuits","Image processing","Very large scale integration","Application software","Computer architecture","Digital signal processing","Detectors","Frequency","Prototypes"
Journal_Title
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/92.532039
Filename
532039
Link To Document