DocumentCode :
3846076
Title :
Hole trap generation in the gate oxide due to plasma-induced charging
Author :
T. Brozek;Y.D. Chan;C.R. Viswanathan
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
Volume :
17
Issue :
9
fYear :
1996
Firstpage :
440
Lastpage :
442
Abstract :
The paper presents results of hole trapping studies in-thin gate oxide of plasma damaged MOS transistors. Process-induced damage was investigated with antenna test structures to enhance the effect of plasma charging. In addition to neutral electron traps and passivated interface damage, which are commonly observed plasma charging latent damage, we observed and identified hole traps, generated by plasma stress. The amount of hole traps increases with increasing antenna ratio, indicating that the mechanism of hole trap generation is based on electrical stress and current flow, forced through the oxide during plasma etching. The density of hole traps in the most damaged devices was found to be larger than that in reference, undamaged devices by about 100%.
Keywords :
"Threshold voltage","Electron traps","Plasma devices","Interface states","Current measurement","Testing","Antenna measurements","Charge measurement","Stress measurement","Plasma measurements"
Journal_Title :
IEEE Electron Device Letters
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/55.536286
Filename :
536286
Link To Document :
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