DocumentCode :
3846239
Title :
A Lab-Scale Alternative Interconnection Solution of Semiconductor Dice Compatible with Power Modules 3-D Integration
Author :
Ludovic M?nager;Maher Soueidan;Bruno Allard;Vincent Bley;Beno?t Schlegel
Author_Institution :
INRETS, LTN Laboratory, Versailles, France
Volume :
25
Issue :
7
fYear :
2010
fDate :
7/1/2010 12:00:00 AM
Firstpage :
1667
Lastpage :
1670
Abstract :
Increase in the power density of power modules requires an interconnection technology alternative to wire-bonding technology. Emerging interconnection technologies allow a 3-D packaging of power modules. A proposal of interconnection solution for the power semiconductor dice is presented here; it is based on copper microposts that are electroplated on topside of the die. The die with its microposts is then attached to a top direct-bonding copper (DBC) substrate using a copper/tin transient liquid phase technique. The assembly of the backside of the die to a bottom DBC substrate is processed concurrently using the same transient liquid phase technique. The benefits or limitations of the substrate on the assembly are not discussed in this letter. Manufacturing and electrical characterization of a power semiconductor die with the microposts interconnection is presented in detail.
Keywords :
"Multichip modules","Assembly","Wire","Laboratories","Switches","Packaging","Copper","Substrates","Bonding","Temperature"
Journal_Title :
IEEE Transactions on Power Electronics
Publisher :
ieee
ISSN :
0885-8993
Type :
jour
DOI :
10.1109/TPEL.2010.2041557
Filename :
5406068
Link To Document :
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