Integration of $\hbox{LaLuO}_{3} \ (\kappa \sim \hbox{30})$ as High-$\kappa$ Dielectric on Strained and Unstrained SOI MOSF

The integration of lanthanum lutetium oxide (LaLuO₃) with a n value of 30 is, for the first time, demonstrated on strained and unstrained SOI n/p-MOSFETs as a gate dielectric with a full replacement gate process. The LaLuO₃/Si interface showed a very thin silicate/SiO₂ interlayer with a D_it level of 4.5 × 10¹¹ (eV · cm²)^-1. Fully depleted n/p-MOSFETs with LaLuO₃/TiN gate stacks indicated very good performance with steep subthreshold slopes of ~70 mV/dec and high I_on/I_off ratios. In addition, strained SOI shows enhanced electron mobilities with a factor of 1.7 compared to SOI. Both electron and hole mobilities for LaLuO₃ on SOI are similar to the mobilities in reported Hf-based high-κ devices.