• DocumentCode
    3850442
  • Title

    RTD–CMOS Pipelined Networks for Reduced Power Consumption

  • Author

    Juan Núñez;María J. Avedillo;José M. Quintana

  • Author_Institution
    Instituto de Microelectró
  • Volume
    10
  • Issue
    6
  • fYear
    2011
  • Firstpage
    1217
  • Lastpage
    1220
  • Abstract
    The incorporation of resonant tunneling diodes (RTDs) into III/V transistor technologies has shown an improved circuit performance, producing higher circuit speed, reduced component count, and/or lower power consumption. Currently, the incorporation of these devices into CMOS technologies (RTD-CMOS) is an area of active research. Although some studies have concentrated on evaluating the advantages of this incorporation, more work in this direction is required. In this letter, we compare RTD-CMOS and pure CMOS realizations of a logic gate network which can be operated in a gate-level pipeline. Significantly lower average power is obtained for RTD-CMOS implementations.
  • Keywords
    "Logic gates","CMOS integrated circuits","Mobile communication","Transistors","Inverters","CMOS technology","Nanoscale devices"
  • Journal_Title
    IEEE Transactions on Nanotechnology
  • Publisher
    ieee
  • ISSN
    1536-125X
  • Type

    jour

  • DOI
    10.1109/TNANO.2011.2157518
  • Filename
    5773497