DocumentCode :
3850792
Title :
Design of a generalized priority queue manager for ATM switches
Author :
H.J. Chao;H. Cheng;Y.-R. Jenq;D. Jeong
Author_Institution :
Dept. of Electr. Eng., Polytech.. Univ., Brooklyn, NY, USA
Volume :
15
Issue :
5
fYear :
1997
Firstpage :
867
Lastpage :
880
Abstract :
Meeting quality of service (QoS) requirements for various services in ATM networks has been very challenging to network designers. Various control techniques at either the call or cell level have been proposed. In this paper, we deal with cell transmission scheduling and discarding at the output buffers of an ATM switch. We propose a generalized priority queue manager (GPQM) that uses per-virtual-connection queueing to support multiple QoS requirements and achieve fairness in both cell transmission and discarding. It achieves the ultimate goal of guaranteeing the QoS requirement for each connection. The GPQM adopts the earliest due date (EDD) and self-clocked fair queueing (SCFQ) schemes for scheduling cell transmission and a new self-calibrating pushout (SCP) scheme for discarding cells. The GPQM´s performance in cell loss rate and delay is presented. An implementation architecture for the GPQM is also proposed, which is facilitated by a new VLSI chip called the priority content-addressable memory (PCAM) chip.
Keywords :
"Asynchronous transfer mode","Quality of service","Switches","Delay","Traffic control","Quality management","Communication system traffic control","Telecommunication traffic","Buffer storage","Scheduling algorithm"
Journal_Title :
IEEE Journal on Selected Areas in Communications
Publisher :
ieee
ISSN :
0733-8716
Type :
jour
DOI :
10.1109/49.594848
Filename :
594848
Link To Document :
بازگشت