DocumentCode :
3850842
Title :
Deterministic Clustering of Incompatible Test Cubes for Higher Power-Aware EDT Compression
Author :
Dariusz Czysz;Grzegorz Mrugalski;Nilanjan Mukherjee;Janusz Rajski;Przemysław Szczerbicki;Jerzy Tyszer
Author_Institution :
Mentor Graphics Polska, Poznañ
Volume :
30
Issue :
8
fYear :
2011
Firstpage :
1225
Lastpage :
1238
Abstract :
The embedded deterministic test-based compression uses cube merging to reduce a pattern count, the amount of test data, and test time. It gradually expands a test pattern by incorporating compatible test cubes. This paper demonstrates that compression ratios can be order of magnitude higher, if the cube merging continues despite conflicts on certain positions. Our novel solution produces test clusters, each comprising a parent pattern and a number of its derivatives obtained by imposing extra bits on it. In order to load scan chains with patterns that feature original test cubes, only data necessary to recreate parent patterns as well as information regarding locations and values of the corresponding conflicting bits are required. A test controller can then deliver tests by repeatedly applying the same parent pattern, every time using a different control pattern to decide whether a given scan chain receives data from the parent pattern, or another pattern is used instead to recover content of the original test cube. Compression of incompatible test cubes preserves all benefits of continuous flow decompression and offers compression ratios of order 1000× with encoding efficiency much higher than 1.0. We also demonstrate that test clusters make it possible to deliver test patterns in a flexible power-aware fashion. This framework achieves significant reductions in switching activity during scan loading as well as additional test data volume reductions due to encoding algorithms employed to compress parent and control vectors.
Keywords :
"Encoding","Merging","Registers","Ring generators","Multiplexing","System-on-a-chip","Generators"
Journal_Title :
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2011.2126574
Filename :
5958190
Link To Document :
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