DocumentCode
3851167
Title
Defect Behaviors During High Electric Field Stress of p-Channel Power MOSFETs
Author
Goran S. Ristic
Author_Institution
Applied Physics Laboratory, Faculty of Electronic Engineering, University of Niš
Volume
12
Issue
1
fYear
2012
Firstpage
94
Lastpage
100
Abstract
The behaviors of the defects in the oxide, near and at the interface during various electric field stress experiments of commercial p-channel power VDMOSFETs, have been investigated. High electric field stress (HEFS), switching HEFS, and switching electric field annealing have been performed. The results have shown that the creations of both the positively charged fixed traps (FTs) (PCFTs) and negatively charged FTs (NCFTs) are more intensive in the case of positive HEFS than negative HEFS. The intermediate steps with low electric field stress do not significantly influence the defect creations in positive HEFS but do influence those in negative HEFS. The slow switching (border) traps have the same nature as FTs, and the same defect types are responsible for PCFT creation during positive and negative HEFSs.
Keywords
"Logic gates","Stress","Switches","Substrates","Charge carrier processes","Transistors","Silicon"
Journal_Title
IEEE Transactions on Device and Materials Reliability
Publisher
ieee
ISSN
1530-4388
Type
jour
DOI
10.1109/TDMR.2011.2168399
Filename
6022761
Link To Document