Competitive decoders for turbo-like chaos-based systems

Recent work has shown that chaos-based communication systems can yield performances as good as their non-chaotic counterparts in additive white Gaussian noise (AWGN), and behave even better in flat-fading channels. However, much of this work relies on computer simulations and there is still a need to study in depth the implementation issues of such systems. The authors address for the first time a fixed-point arithmetic implementation of the iterative decoding algorithm for a recently proposed and successful class of parallel concatenated chaos-based coded modulations. The novel digital signal processor (DSP) results demonstrate that it is possible to implement in standard hardware competitive chaos-based communication systems.