Title :
Register binding based power management for high-level synthesis of control-flow intensive behaviors
Author :
Zhong, Lin ; Luo, Jiong ; Fei, Yunsi ; Jha, Niraj K.
Author_Institution :
Dept. of Electr. Eng., Princeton Univ., NJ, USA
Abstract :
A circuit or circuit component that does not contain any spurious switching activity, i.e., activity that is not required by its specified functionality, is called perfectly power managed (PPM). We present a general sufficient condition for register binding to ensure that a given set of functional units is PPM. This condition not only applies to data-flow intensive (DFI) behaviors but also to control-flow intensive (CFI) behaviors. It leads to a straightforward power-managed (PM) register binding algorithm. The proposed algorithm is independent of the functional unit binding and scheduling algorithms. Hence, it can be easily incorporated into existing high-level synthesis systems. For the benchmarks we experimented with, an average 45.9% power reduction was achieved by our method at the cost of 7.7% average area overhead, compared to power-optimized register-transfer level (RTL) circuits which did not use PM register binding.
Keywords :
high level synthesis; low-power electronics; algorithms; average area overhead; benchmarks; control flow intensive behaviors; functional units; high-level synthesis; perfectly power managed circuit; power reduction; power-managed register binding algorithm; register binding based power management; Circuits; Contracts; Cost function; Energy management; Engineering management; High level synthesis; Iron; Latches; Registers; Sufficient conditions;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 2002. Proceedings. 2002 IEEE International Conference on
Print_ISBN :
0-7695-1700-5
DOI :
10.1109/ICCD.2002.1106800