DocumentCode
385785
Title
A 2 Gb/s Throughput GaAs Digital Time Switch LSI Using LSCFL
Author
Takada, Tohru ; Shimazu, Yoshihiro ; Yamasaki, Kimiyoshi ; Togashi, Minoru ; Hoshikawa, Keigo ; Idda, Masao
Volume
85
Issue
1
fYear
1985
fDate
31199
Firstpage
22
Lastpage
26
Abstract
A GaAs four channel digital time switch having a 2.0 Gb/s throughput is developed. Low Power Source Coupled FET Logic (LSCFL) and 0.55 µm gate length buried p-layer SAINT-FETs are applied. The switch includes 1176 devices (FETs, diodes, and resistors). The 75 % fabrication yield is attained using dislocation free wafers.
Keywords
Circuits; Communication switching; FETs; Fabrication; Frequency conversion; Gallium arsenide; Large scale integration; Logic devices; Switches; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave and Millimeter-Wave Monolithic Circuits
Type
conf
DOI
10.1109/MCS.1985.1113649
Filename
1113649
Link To Document