A 900 MHz 1.2 V CMOS mixer with high linearity

Author

Cheng, Wang-Chi ; Cheong-Fat Chan ; Choy, Chiu-Sing ; Pun, Kong-Pang

Author_Institution

Dept. of Electron. Eng., Chinese Univ. of Hong Kong, Shatin, China

Volume

1

fYear

2002

fDate

2002

Firstpage

1

Abstract

A CMOS down-conversion mixer, using a current mode multiplication technique, is demonstrated in this paper. Apart from low voltage operation, the new mixer has a very good linearity; the measured IIP₃ (third-order input intercept point) is equal to 9.5 dBm. The new mixer circuit is specially designed for low voltage communication circuits using RF CMOS. The operating voltage is 1.2 V and the measured power consumption of the mixer is 3 mW.

Keywords

CMOS integrated circuits; UHF integrated circuits; UHF mixers; current-mode circuits; integrated circuit design; integrated circuit measurement; low-power electronics; 1.2 V; 3 mW; 900 MHz; CMOS high linearity down-conversion mixers; RF CMOS; current mode multiplication techniques; low voltage communication circuits; low voltage operation; mixer linearity; operating voltage; power consumption; third-order input intercept point; CMOS technology; Circuits; Current measurement; Energy consumption; Linearity; Low voltage; Modems; Power measurement; Radio frequency; Semiconductor device measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2002. APCCAS '02. 2002 Asia-Pacific Conference on

Print_ISBN

0-7803-7690-0

Type

conf

DOI

10.1109/APCCAS.2002.1114896

Filename

1114896