Title :
High speed JPEG2000 encoder by configurable processor
Author :
Tsutsui, Hiroshi ; Masuzaki, Takahiko ; Izumi, Tomonori ; Onoye, Takuo ; Nakamura, Yukihiro
Author_Institution :
Dept. of Commun. & Comput. Eng., Kyoto Univ., Japan
Abstract :
This paper discusses a design of high speed JPEG2000 encoder. JPEG2000 entropy coding is realized by hardware module since its computational cost accounts for roughly 65% of total according to software profiling. Discrete wavelet transformation (DWT) is accelerated by attaching user-defined instructions to Tensilica´s configurable processor Xtensa. Utilizing the 8,700 gate entropy coder with 27 Kbit of memory and the custom instructions implemented by 8,000 gates, the number of cycles needed to encode an image is reduced to 31%.
Keywords :
discrete wavelet transforms; entropy codes; image coding; reconfigurable architectures; 27 Kbit; JPEG2000 encoder; Xtensa; computational cost; configurable processor; discrete wavelet transformation; entropy coding; image coding; software profiling; user-defined instructions; Arithmetic; Computational efficiency; Design engineering; Discrete wavelet transforms; Encoding; Entropy coding; Hardware; Image coding; Joining processes; Tiles;
Conference_Titel :
Circuits and Systems, 2002. APCCAS '02. 2002 Asia-Pacific Conference on
Print_ISBN :
0-7803-7690-0
DOI :
10.1109/APCCAS.2002.1114905
