DocumentCode
385919
Title
Enhanced reusability for SoC-based HW/SW co-design
Author
Boden, Maik ; Schneider, Jörg ; Feske, Klaus ; Rülke, Steffen
Author_Institution
FhG IIS Erlangen - Branch Lab. DA Dresden, Germany
fYear
2002
fDate
2002
Firstpage
94
Lastpage
99
Abstract
This paper addresses design methods for SoC-based HW/SW systems using reconfigurable architectures. The emphasis is the development of a method to enhance the reusability of HW and SW in the co-design process using proven languages like ANSI-C and VHDL. We distinguish between three abstraction layers for design modules consisting of both HW and SW This approach benefits the reuse of HW sources as well as SW sources for different applications as well as on different devices. We utilize the reconfigurable SoC Atmel FPSLIC for experimental tests and obtain a significant reuse ratio.
Keywords
ANSI standards; hardware description languages; hardware-software codesign; reconfigurable architectures; system-on-chip; ANSI-C; SoC-based HW/SW codesign; VHDL; abstraction layers; codesign process; design methods; design modules; enhanced reusability; reconfigurable SoC Atmel FPSLIC; reconfigurable architectures; Context; Costs; Design methodology; Field programmable gate arrays; Global Positioning System; Mobile handsets; Partitioning algorithms; Reconfigurable architectures; Reconfigurable logic; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital System Design, 2002. Proceedings. Euromicro Symposium on
Print_ISBN
0-7695-1790-0
Type
conf
DOI
10.1109/DSD.2002.1115356
Filename
1115356
Link To Document