A pulsed interface-probing technique for MOS interface characterization at mid-gap levels

A pulsed interface-probing (PIP) technique for extracting interface trap density and capture cross section parameters on gate-controlled diodes or on MOS transistors is described. The technique is applied by periodically driving the device from the depletion into strong inversion by narrow gate pulses. The resulting source current is measured and subtracted from the source current measured in DC depletion. The difference, evaluated as a function of the depletion period, yields not only D/sub it/ and sigma but also the characteristics of sigma distribution. Reliance on current instead of capacitance, independence from internal and terminal potentials, and the use of a single test variable greatly simplify the analytical procedure. However, the technique lacks bandgap scanning ability. PIP is first presented for the case of single-valued sigma , and then the theory is extended to the case of distributed oxide traps. The technique has been experimentally tested on <111> and <100> gate-controlled diodes. The results are in good agreement with the theoretical predictions.