• DocumentCode
    3863072
  • Title

    Keynote talk II: Accelerating data centers using reconfigurable logic

  • Author

    Derek Chiou

  • Author_Institution
    Microsoft and The University of Texas at Austin
  • fYear
    2015
  • Firstpage
    60
  • Lastpage
    60
  • Abstract
    Reconfigurable logic has the potential to provide hardware level performance with the flexibility of software. Such properties make it an interesting solution in data center environments that value high throughput, low latency, low power, and uniformity of hardware. Microsoft has been exploring the use of reconfigurable logic in its data centers. In this talk, I will describe some of our efforts in this area.
  • Keywords
    "Acceleration","Field programmable gate arrays","Computer architecture","Hardware","Team working","Computer simulation","System analysis and design"
  • Publisher
    ieee
  • Conference_Titel
    Formal Methods and Models for Codesign (MEMOCODE), 2015 ACM/IEEE International Conference on
  • Type

    conf

  • DOI
    10.1109/MEMCOD.2015.7340470
  • Filename
    7340470