Millimeter-wave CMOS power amplifier using slow-wave transmission lines

A three-stage 60-GHz power amplifier was implemented in a 65 nm CMOS technology. High-quality-factor slow-wave coplanar waveguides were used for input, output and inter-stage matching networks in order to improve the performance. In Class-A operation, the power amplifier exhibits a measured maximum linear power gain G of 18.3 dB at 55 GHz, with a 3-dB bandwidth of 8.5 GHz. The measured 1-dB output compression point OCP_1dB and the maximum saturated output power P_sat are 12 dBm and 14.2 dBm, respectively, with a DC power consumption of 156 mW under 1.2 V voltage supply. The measured peak power added efficiency PAE is 16 %. The die area is 0.52 mm² (875 ×m × 600 μm) including all the pads, whereas the effective area is only 0.24 mm².