DocumentCode
387006
Title
A GaAs High-Speed Counter Using Current Mode Logic
Author
Suyama, Katsuhiko ; Suzuki, Hidetake ; Nemoto, Yasuo ; Yamamura, Shigevuki ; Fukuta, Masumi
Volume
83
Issue
1
fYear
1983
fDate
31 May-1 Jun 1983
Firstpage
12
Lastpage
16
Abstract
A single-clocked divide-by-four counter with maximum operating frequency of 3.4 GHz has been developed. The circuit was fabricated using a tungsten-silicide gate self-alignment technique with full ion implantation. The basic building block of the counter current mode logic (CML) master-slave flip-flop similar to Si ECL.
Keywords
Clocks; Counting circuits; Coupling circuits; Driver circuits; FETs; Flip-flops; Gallium arsenide; Logic; Resistors; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave and Millimeter-Wave Monolithic Circuits
Type
conf
DOI
10.1109/MCS.1983.1151032
Filename
1151032
Link To Document