Title :
A reprogrammable filter bank using CCD discrete analog signal processing
Abstract :
A multichannel filter using a 32-stage CCD analog shift register (ASR), will be described. The filter uses a recursive two-pole, one-zero network. The center frequencies, bandwidths and gains, are independently programmed using four quadrant multiplying digital-to-analog converters.
Keywords :
Automatic speech recognition; Charge coupled devices; Delay lines; Digital filters; Filter bank; Filtering theory; Frequency; Shift registers; Signal processing; Switches;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1975 IEEE International
DOI :
10.1109/ISSCC.1975.1155467
