Title :
Efficient solution space exploration based on segment trees in analog placement with symmetry constraints
Author :
Balasa, Florin ; Maruvada, Sarat C. ; Krishnamoorthy, Karthik
Author_Institution :
Dept. of Comput. Sci., Illinois Univ., Chicago, IL, USA
Abstract :
The traditional way of approaching device-level placement problems for analog layout is to explore a huge search space of absolute placement representations, where cells are allowed to illegally overlap during their moves (J. Cohn et al., Analog Device-Level Automation, Kluwer Acad. Publ., 1994; K. Lampaert et al., IEEE J. Solid-State Circ., vol. SC-30, no. 7, pp. 773-780, 1995; E. Malavasi et al., IEEE Trans. CAD, vol. 15, no. 8, pp. 923-942, 1996). This paper presents a novel analog placement technique operating on the set of binary tree representations of the layout (Y.C. Chang et al., Proc. 87th ACM/IEEE Des. Aut. Conf., pp. 458-463, 2000), where the typical presence of an arbitrary number of symmetry groups of devices is directly taken into account during the exploration of the solution space. The efficiency of the novel approach is due to a data structure called segment tree, mainly used in computational geometry.
Keywords :
analogue integrated circuits; circuit complexity; circuit layout CAD; integrated circuit layout; network topology; search problems; trees (mathematics); absolute placement representations; analog layout; analog placement; binary tree layout representations; computational geometry; data structure; device-level placement; illegal cell overlap; search space; segment trees; solution space exploration; symmetry constraints; symmetry groups; Analog circuits; Computational geometry; Computer science; Constraint optimization; Cost function; Coupling circuits; Encoding; Routing; Space exploration; Tree data structures;
Conference_Titel :
Computer Aided Design, 2002. ICCAD 2002. IEEE/ACM International Conference on
Print_ISBN :
0-7803-7607-2
DOI :
10.1109/ICCAD.2002.1167578