• DocumentCode
    387629
  • Title

    Post global routing RLC crosstalk budgeting

  • Author

    Xiong, Jinjun ; Chen, Jun ; Ma, James ; He, Lei

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
  • fYear
    2002
  • fDate
    10-14 Nov. 2002
  • Firstpage
    504
  • Lastpage
    509
  • Abstract
    Existing layout optimization methods often assume a set of interconnects with given RLC crosstalk bounds in a routing region. RLC crosstalk bound partitioning is critical for effectively applying these methods at the full-chip level. In this paper, we develop an optimal crosstalk budgeting scheme based on linear programming (LP) formulation, and apply it to shield insertion and net ordering at the full-chip level. Experiment results show that compared to the best alternative approach, the LP based method reduces the total routing area by up to 7.61% and also uses less runtime. To the best of our knowledge, this is the first in-depth work that studies the RLC crosstalk budgeting problem.
  • Keywords
    RLC circuits; circuit layout CAD; circuit optimisation; crosstalk; integrated circuit interconnections; integrated circuit layout; integrated circuit modelling; linear programming; network routing; LP based method; RLC crosstalk bound partitioning; RLC crosstalk bounds; full-chip level methods; interconnects; layout optimization methods; linear programming formulation; net ordering; post-global routing RLC crosstalk budgeting; routing area; routing region; runtime; shield insertion; Constraint optimization; Crosstalk; Engineering profession; Helium; Linear programming; Optimization methods; Routing; Runtime; Very large scale integration; Wires;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Aided Design, 2002. ICCAD 2002. IEEE/ACM International Conference on
  • ISSN
    1092-3152
  • Print_ISBN
    0-7803-7607-2
  • Type

    conf

  • DOI
    10.1109/ICCAD.2002.1167579
  • Filename
    1167579