Title :
Simplification of non-deterministic multi-valued networks
Author :
Mishchenko, Alexander ; Brayton, Robert
Author_Institution :
Dept. of Electr. & Comput. Eng., Portland State Univ., OR, USA
Abstract :
We discuss the simplification of non-deterministic multi-valued (MV) networks and their internal nodes using internal flexibilities. Given the network structure and its external specification, the flexibility at a node is derived as a non-deterministic MV relation. This flexibility is used to simplify the node representation and enhance the effect of Boolean resubstitution. We show that the flexibility derived is maximum. The proposed approach has been implemented and tested in MVSIS. Experimental results show that it performs well on a variety of MV and binary benchmarks.
Keywords :
Boolean functions; binary decision diagrams; circuit CAD; circuit optimisation; circuit simulation; integrated circuit design; integrated circuit modelling; logic CAD; logic partitioning; logic simulation; multivalued logic circuits; BDD; Boolean resubstitution; MV network internal nodes; MV network optimization; MVSIS; internal node flexibilities; network structure external specification; node representation; nondeterministic MV relations; nondeterministic multi-valued logic network simplification; partitioning; Benchmark testing; Circuit synthesis; Circuit testing; Computer networks; Data mining; Logic circuits; Logic testing; Multivalued logic; Network synthesis; Performance evaluation;
Conference_Titel :
Computer Aided Design, 2002. ICCAD 2002. IEEE/ACM International Conference on
Print_ISBN :
0-7803-7607-2
DOI :
10.1109/ICCAD.2002.1167587
