DocumentCode
388038
Title
A block diagram compiler for a digital signal processing MIMD computer
Author
Zissman, M.A. ; O´Leary, G.C. ; Johnson, D.H.
Author_Institution
Lincoln Laboratory, M.I.T., Lexington, MA
Volume
12
fYear
1987
fDate
31868
Firstpage
1867
Lastpage
1870
Abstract
A Block Diagram Compiler (BOC) has been designed and implemented for converting graphic block diagram descriptions of signal processing tasks into source code to be executed on a Multiple Instruction Stream - Multiple Data Stream (MIMD) array computer. The compiler takes as input a block diagram of a real-time DSP application, entered on a graphics CAE workstation, and translates it into efficient real-time assembly language code for the target multiprocessor array. The current implementation produces code for a rectangular grid of Texas Instruments TMS32010 signal processors built at Lincoln Laboratory, but the concept could be extended to other processors or other geometries in the same way that a good assembly language programmer would write it. This report begins by examining the current implementation of the BOC including relevant aspects of the target hardware. Next, we describe the task-assignment module, which uses a simulated annealing algorithm to assign the processing tasks of the DSP application to individual processors in the array. Finally, our experiences with the current version of the BOC software and hardware are reported.
Keywords
Application software; Array signal processing; Assembly; Computer aided engineering; Computer aided instruction; Computer graphics; Digital signal processing; Hardware; Signal design; Workstations;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '87.
Type
conf
DOI
10.1109/ICASSP.1987.1169552
Filename
1169552
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