Limited wordlength and FDCT processing accuracy

For hardware realization of the fast discrete cosine transform (FDCT) processor, as the parameters can only be specified by a finite number of binary digits (bits), the computational accuracy is governed by the precision by which the parameters are represented. To measure the effect of limited word-length, mathematical analysis is used initially to develop theoretical effects of the sensitive parameters on the processing accuracy. By simulation, the theoretical results are verified, and the results are then extended for further detailed simulation studies. Finally, the simulation results are used to develop general guidelines for optimizing the hardware design of any size FDCT or fast inverse DCT (FIDCT) processor.