DocumentCode
388358
Title
A 9.6 kb/s speech coder using the Bell laboratories DSP integrated circuit
Author
Crochiere, R.E. ; Cox, R.V. ; Johnston, J.D. ; Seltzer, L.A.
Author_Institution
Bell Laboratories, Murray Hill, New Jersey
Volume
7
fYear
1982
fDate
30072
Firstpage
1692
Lastpage
1695
Abstract
A digital speech coder has been designed for real-time operation for a data rate of 9.6 kb/s. The design is based on a combination of two speech compression techniques: Time-Domain Harmonic Scaling (TDHS) and Sub-Band Coding (SBC). It is a highly modularized hardware implementation using five Bell Laboratories Digital Signal Processor (DSP) integrated circuits as the key processing elements. Three DSPs are used in the encoder for pitch detection, TDHS compression and sub-band encoding. Another two DSPs are used in the receiver for sub-band decoding and TDHS expansion.
Keywords
Acoustic signal detection; Autocorrelation; Decoding; Detectors; Digital signal processing; Influenza; Logic circuits; Logic design; Nonlinear filters; Speech;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '82.
Type
conf
DOI
10.1109/ICASSP.1982.1171414
Filename
1171414
Link To Document