DocumentCode
388397
Title
Integrated floating point signal processor
Author
Bottcher, K. ; Lacroix, A. ; Talmi, M. ; Wesseling, D.
Author_Institution
Heinrich-Hertz-Institut für Nachrichtentechnik, Berlin, W.-Germany
Volume
7
fYear
1982
fDate
30072
Firstpage
1088
Lastpage
1091
Abstract
Recent advances in technology of VLSI circuits enable economical hardware implementation of highly sophisticated signal processing algorithms. This provides the capability of realising a signal processor with uniform hardware for wide real-time applications. The adaption of the VLSI circuits to special application is possible by appropriate microprograms. The processor speed is determined by the arithmetic unit, particularly if floating point arithmetic is necessary. The processing speed can be increased by decreasing the operation time of the arithmetic unit and by the use of several adders, several multipliers, multiport memory and pipeline technique.
Keywords
Circuits; Dynamic range; Floating-point arithmetic; Hardware; Signal processing; Signal processing algorithms; Signal representations; Signal to noise ratio; Throughput; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '82.
Type
conf
DOI
10.1109/ICASSP.1982.1171581
Filename
1171581
Link To Document