DocumentCode :
388401
Title :
An LSI digital signal processor
Author :
Yano, M. ; Inoue, K. ; Senba, T.
Author_Institution :
Nippon Electric Co., Ltd., Kawasaki, Japan
Volume :
7
fYear :
1982
fDate :
30072
Firstpage :
1073
Lastpage :
1076
Abstract :
This paper describes a recently developed single-chip digital signal processor designed to satisfy the requirements of a wide range of telecommunication applications. The device is fabricated with N-channel MOS technology and contains 65,000 transistors within a 7.9 by 7.44 mm area. It has many features for efficient pipelined operations and achieves a high degree of throughput. The processor also has large data memories: 512 words of ROM and 256 words of RAM. The I/O unit includes an on-chip DMA controller which allows the processor to be readily interfaced with other devices. Multiprocessor systems are constructed with no external logic.
Keywords :
Digital signal processors; Large scale integration; Logic devices; MOSFETs; Multiprocessing systems; Process design; Random access memory; Read only memory; Signal design; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '82.
Type :
conf
DOI :
10.1109/ICASSP.1982.1171590
Filename :
1171590
Link To Document :
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