Title :
Algorithm and a new processor architecture for computing the DFT
Author_Institution :
GEC Research Laboratories, Middlesex, UK
Abstract :
A new architecture for a DFT processor, based on the prime factor algorithm (PFA) is proposed. This processor offers very high throughput rates and is well matched to present LSI implementation capabilities. A new indexing scheme for the PFA is also presented, which results in an in-place and in-order flexible algorithm.
Keywords :
Computer architecture; Digital signal processing; Discrete Fourier transforms; Hardware; Indexing; Integrated circuit technology; Laboratories; Large scale integration; Signal processing algorithms; Throughput;
Conference_Titel :
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '83.
DOI :
10.1109/ICASSP.1983.1172237
