DocumentCode
388562
Title
Implementation of the RELP vocoder using the TMS320
Author
Dankberg, Mark ; Iltis, Ron ; Saxton, Dave ; Wilson, Phil
Author_Institution
M/A-COM LINKABLE Inc., San Diego, CA
Volume
9
fYear
1984
fDate
30742
Firstpage
449
Lastpage
452
Abstract
A very small, high quality RELP Vocoder has been implemented with commercially available Integrated Circuits. This full-duplex, single-card design uses two TI TMS320 Digital Signal Processors. One processor implements the RELP Vocoder Analysis algorithm and the second implements the Synthesis algorithm. The Vocoder operates with a software-controlled, flexible data rate between 9.6 and 32 KBPS. It occupies less than 35 square inches with a power consumption of less than 5 W. A real-time demonstration is available.
Keywords
Algorithm design and analysis; Design engineering; Linear predictive coding; Random access memory; Read-write memory; Signal design; Signal generators; Signal processing algorithms; Signal synthesis; Vocoders;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '84.
Type
conf
DOI
10.1109/ICASSP.1984.1172494
Filename
1172494
Link To Document