An algorithm basis for systolic/Wavefront array software

In many signal processing, image processing, and scientific computation applications, there are tremendous demands for large-volume and/or high-speed computations. At the same time, the advent of VLSI offers computing hardware at extremely low cost. These factors combined are bound to have a major effect on the up-grading of future supercomputers. With very large scale integration of systems in mind, a special emphasis is placed on massively parallel, highly modular, and locally interconnected array processors. The algorithmic, architectural, and software principles for the design of VLSI array processors are discussed.