DocumentCode :
388622
Title :
MOS-VLSI pipelined digital filters for video applications
Author :
Ulbrich, W. ; Noll, T. ; Zehner, B.
Author_Institution :
Siemens AG, Munich, FR Germany
Volume :
9
fYear :
1984
fDate :
30742
Firstpage :
386
Lastpage :
389
Abstract :
The interactions between digital filter design and VLSI design methodology are discussed. The constraints imposed by the MOS-architecture are discussed, an appropriate filter structure is proposed. The mapping of this structure to a VLSI-realization is shown for intermediate and high sample rates. Design examples for FIR and IIR filters for video applications and lowpass filters for decimation and interpolation are given.
Keywords :
Adders; Design methodology; Digital filters; Finite impulse response filter; IIR filters; Pipeline processing; Routing; Systolic arrays; Transversal filters; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '84.
Type :
conf
DOI :
10.1109/ICASSP.1984.1172691
Filename :
1172691
Link To Document :
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