A reconfigurable SoC architecture for high volume and multichannel data transaction in industrial environments

Author

Astarloa, Armando ; Bidarte, Unai ; Zuloaga, Aitzol

Author_Institution

Dept. of Electron. & Telecommun., Univ. of the Basque Country, Bilbao, Spain

Volume

3

fYear

2002

fDate

5-8 Nov. 2002

Firstpage

2322

Abstract

We present an architecture for electronic boards which combines the advantages of system-on-chip integration and the use of flash microcontrollers with analog capabilities. The design of the SoC follows an standard specification for interconnection architecture for IP cores. "Upgradable hardware" and "reconfigurability" features have been added to the system in order to decrease complexity and price.

Keywords

DRAM chips; EPROM; field programmable gate arrays; microcontrollers; reconfigurable architectures; system-on-chip; DRAM; EEPROM; FPGA; IP cores; WISHBONE SoC interconnection architecture; analog capabilities; electronic boards; flash microcontrollers; high volume data transaction; industrial environments; interconnection architecture; multichannel data transaction; reconfigurability; reconfigurable SoC architecture; system-on-chip architecture; system-on-chip integration; upgradable hardware; Communication industry; EPROM; Electronics industry; Field programmable gate arrays; Industrial electronics; Integrated circuit interconnections; Microcontrollers; Silicon; Space technology; System-on-a-chip;

fLanguage

English

Publisher

ieee

Conference_Titel

IECON 02 [Industrial Electronics Society, IEEE 2002 28th Annual Conference of the]

Print_ISBN

0-7803-7474-6

Type

conf

DOI

10.1109/IECON.2002.1185335

Filename

1185335