Integration of passive and active components into build-up layers

In the last few years, an increasing number of mobile electronic products have been launched to the market, like mobile communicators, combining the RF functions of a mobile phone and the complexity of a palm top computer. Inside these devices there is less and less space for the electronic system, while packaging density and operating frequencies are constantly increasing. Additionally, the product life time is going down, requiring short design cycles and a production at low-cost based on well established technologies. These trends are a strong challenge for microelectronic packaging and assembly technology. An advanced packaging concept is presented, the chip in polymer technology, which aims to face the above mentioned challenges. It is based on the embedding of ultra thin semiconductor chips into the build-up layers of printed circuit boards together with integrated passive components. Processing issues with regard to registration tolerances between embedded chips and metal lines are discussed. First results of the formation of integrated resistors are shown, using electrolessly deposited NiP layers. The embedding technology is put into relation to common interconnection technologies regarding expected RF properties and system design aspects. Basic thermomechanical properties of a first technology demonstrator, a stackable chip scale package, is discussed using finite element modeling.