Investigations using floating-gate circuits for flash ADCs

Typically, high speed analog to digital converters are built using various forms of flash converter architectures. However, all of these structures suffer from one major flaw: offsets. Whether these offsets are introduced from the resistive biasing network, mismatches in the comparators, or from other sources, extensive care must be taken to compensate for them. To compensate for these offsets, we investigated the use of floating-gate circuits in a 6-bit flash ADC. By using the floating-gate circuits we are able to program the necessary reference voltages instead of depending on a resistive biasing network. The floating-gate circuits also enable us to compensate for any other offsets. In addition, programming the reference voltages reduces the power dissipation required for biasing the comparator array, and it allows us to implement nonlinear codes. In fact, we can implement any monotonic coding scheme including μ-law, exponential, and others.