DocumentCode
391729
Title
Reduction in hardware by allowing adder sharing in filter coefficients
Author
Madgula, Sunil K. ; Soderstrand, Michael A.
Author_Institution
Dept. of Electr. & Comput. Eng., Oklahoma State Univ., Stillwater, OK, USA
Volume
2
fYear
2002
fDate
4-7 Aug. 2002
Abstract
Savings in the hardware is better achieved by reducing the number of adders required to perform the shift and add multiplication used in the filter coefficients. A new method of reducing the hardware complexity in designing a transposed direct form filter is investigated and the reduction in the costs by this method is presented.
Keywords
FIR filters; adders; FIR digital filter; adder sharing; filter coefficients; hardware design; multiplication; transposed direct form filter; Adders; Circuits; Cost function; Equations; Filters; Frequency; Graphical user interfaces; Hardware; Passband; USA Councils;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on
Print_ISBN
0-7803-7523-8
Type
conf
DOI
10.1109/MWSCAS.2002.1186831
Filename
1186831
Link To Document